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| MC100EPT21 Differential LVPECL to LVTTL Translator The MC100EPT21 is a Differential LVPECL to LVTTL translator. Because LVPECL (Positive ECL) levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package makes the EPT21 ideal for applications which require the translation of a clock or data signal. The VBB output allows the EPT21 to also be used in a single-ended input mode. In this mode the VBB output is tied to the D0 input for a non-inverting buffer or the D0 input for an inverting buffer. If used, the VBB pin should be bypassed to ground via a 0.01F capacitator. http://onsemi.com 8 1 SO-8 D SUFFIX CASE 751 * * * * * * * * * * * * * * 1.4ns Typical Propagation Delay 275MHz Fmax (Clock bit stream, not pseudo-random) Differential LVPECL inputs Small Outline SOIC Package 24mA TTL outputs Flow Through Pinouts Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D Q Output will default LOW with inputs open or at GND ESD Protection: >1500V HBM, >100V MM VBB Output New Differential Input Common Mode Range Moisture Sensitivity Level 1, Indefinite Time Out of Drypack. For Additional Information, See Application Note AND8003/D Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34 Transistor Count = 81 devices MARKING DIAGRAM 8 KPT21 ALYW 1 *For additional information, see Application Note AND8002/D A L Y W = Assembly Location = Wafer Lot = Year = Work Week PIN DESCRIPTION PIN Q D, D VCC VBB GND FUNCTION LVTTL Output Differential LVPECL Input Pair Positive Supply Output Reference Voltage Ground NC 1 LVTTL 8 VCC D 2 7 Q D 3 LVPECL 6 NC ORDERING INFORMATION Device Package SOIC SOIC Shipping 98 Units/Rail 2500 Tape & Reel VBB 4 5 GND MC100EPT21D MC100EPT21DR2 Figure 1. 8-Lead Pinout (Top View) and Logic Diagram (c) Semiconductor Components Industries, LLC, 1999 1 September, 1999 - Rev. 1.0 Publication Order Number: MC100EPT21/D MC100EPT21 MAXIMUM RATINGS* Symbol VCC VI Iout IBB TA Tstg JA JC Tsol Parameter Power Supply (GND = 0V) Input Voltage (GND = 0V, VI not more positive than VCC) Output Current VBB Sink/Source Current{ Operating Temperature Range Storage Temperature Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Solder Temperature (<2 to 3 Seconds: 245C desired) Still Air 500lfpm Continuous Surge Value 0 to 3.8 0 to 3.8 50 100 0.5 -40 to +85 -65 to +150 190 130 41 to 44 5% 265 Unit VDC VDC mA mA C C C/W C/W C * Maximum Ratings are those values beyond which damage to the device may occur. { Use for inputs of same package only. DC CHARACTERISTICS (VCC = 3.3V 0.3V; GND = 0V; TA = -40C to 85C) Symbol ICCH ICCL VIH VIL IIH IIL VOH VOL IOS Characteristic Power Supply Current (Outputs set to HIGH) Power Supply Current (Outputs set to LOW) Input HIGH Voltage (VCC = 3.3) (Note 1.) Input LOW Voltage (VCC = 3.3) (Note 1.) Input HIGH Current Input LOW Current Output HIGH Voltage (IOH = -3.0mA) (Note 2.) Output LOW Voltage (IOL = 24mA) (Note 2.) Output Short Circuit Current -130 2.0 D D -150 2.4 0.5 -80 3.3 V V mA V Min 5.0 8.0 2135 1490 Typ 12 18 Max 20 26 2420 1825 150 0.5 Unit mA mA mV mV A A VIHCMR Input HIGH Voltage Common Mode Range (Note 3.) VBB Output Voltage Reference 2.0 V NOTE: 100EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 1. All values vary 1:1 with VCC. 2. All loading with 500 ohms to GND, CL = 20pF. 3. VIHCMR min varies 1:1 with GND, max varies 1:1 with VCC. AC CHARACTERISTICS (VCC = 3.3V 0.3V; GND = 0V) -40C Symbol fmax tPLH, tPHL tSK++ tSK- - tSKPP tJITTER VPP Characteristic Maximum Toggle Frequency (Note 4.) Propagation Delay to Output Differential Output-to-Output Skew++ Output-to-Output Skew- - Part-to-Part Skew (Note 5.) Cycle-to-Cycle Jitter Input Voltage Swing (Diff.) 150 Min 275 1000 1000 Typ 350 1450 1400 60 25 500 TBD 800 1200 150 1800 1800 Max Min 275 1000 1000 25C Typ 350 1450 1400 60 25 500 TBD 800 1200 900 150 330 1800 1800 Max Min 275 1000 1000 85C Typ 350 1450 1400 60 25 500 TBD 800 500 1200 900 1900 1900 ps ps Max Unit MHz ps mV ps tr Output Rise/Fall Times tf (0.8V - 2.0V) Q, Q 330 500 900 330 500 4. Fmax guaranteed for functionality only. VOL and VOH levels are guaranteed at DC only. 5. Skews are measured between outputs under identical transitions. http://onsemi.com 2 MC100EPT21 PACKAGE DIMENSIONS SO-8 D SUFFIX PLASTIC SOIC PACKAGE CASE 751-06 ISSUE T A 8 D 5 C E 1 4 H 0.25 M B M h B C e A SEATING PLANE X 45 _ NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ q L 0.10 A1 B 0.25 M CB S A S q http://onsemi.com 3 MC100EPT21 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION USA/EUROPE Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line*: 303-675-2167 800-344-3810 Toll Free USA/Canada *To receive a Fax of our publications ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-8549 Phone: 81-3-5487-8345 Email: r14153@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. N. America Technical Support: 800-282-9855 Toll Free USA/Canada http://onsemi.com 4 MC100EPT21/D |
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